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40 Gb/s Ethernet optimized for client applications in the carrier

Reuse and compatibility with P802.3ba sub layers– 40GBASE-LR4 vs. 40GBASE-xR


Key to Architecture Diagram

1. Identical Specification and Implementation with P802.3ba 40GBASE-LR4 (clauses 80-82, clause 83 for PMA(4:4)).

2. Specification Reuse from P802.3ba. While a 40GBASE-R PMA(4:1) is not required to support any P802.3ba PMD, clause 83 fully specifies how the PMA(4:1) will behave

3. New PMD specification required for 40GBASE-xR


OTN Support 40GBASE-LR4 vs 40GBASE-xR

  • The information content (ITU-T term = “characteristic information”) of an 802.3ba signal is comprised of the PCS lanes. The way that those PCS lanes are mapped or sequenced onto physical lanes (as long as within the skew budget) is irrelevant.
  • The assurance that 40GBASE-R signals can be mapped with PCS codeword transparency into OPU3 is provided through a well-defined PCS codeword set and accompanying warnings and prohibitions in clause 82. Since 40GBASE-xR will use this same PCS, the attributes that assure that it can be mapped into OPU3 will be maintained. Note that the mapping in ITU-T G.709 of 40GBASE-R into OPU3 operates by transcoding the PCS codewords described in clause 82, and does not rely on the relationship between PCS lanes and physical lanes in the Ethernet PMD.
  • The following configuration will work due to use of the clause 82 PCS:


Other compatibility aspects

Additional skew between PCS lanes will not accrue over the serial medium which maintains the bit multiplexing order. Both the total skew and skew variation between SP3 and SP4 will be less for 40GBASE-xR than for 40GBASE-LR4. Therefore a PCS which supports the skew budget of 40GBASE-LR4 (subclause 80.5) can tolerate the total skew and skew variation of 40GBASE-xR.

Since serial was a candidate solution considered in the P802.3ba task force, the lane marking and alignment processes, together with the clock content and baseline wander arising from bit multiplexing of four PCSLs have already been analyzed and found to be acceptable.

If clause 83B chip-to-module XLAUI is implemented and if the module form factor and electrical interface are the same, the same host board can be used for 40GBASE-LR4 and 40GBASE-xR

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